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| A1448 Low-Voltage, Full-Bridge Brushless DC Motor Driver with Integrated Hall Sensor IC, PWM Speed Control, Soft-Switching, and Reverse Battery and Short Circuit Protection Features and Benefits Low-voltage operation, 1.8 to 4.2 V Multifunction CONTROL pin input: Direct input PWM for speed control Active braking for fast stop cycle Sleep function to reduce average power consumption Reverse voltage protection on VDD and CONTROL pins Output thermal shutdown protection for robust performance Soft switching algorithm to reduce audible switching noise and EMI Hall chopper stabilization technique for precise signal response over operating range Antistall feature guarantees continuous rotation and prevents overheating Single-chip solution for high reliability Miniature MLP/DFN package with industry-leading 0.40 mm maximum overall thickness Description The A1448 is a full-bridge motor driver designed to drive low-voltage, brushless DC motors. The device is designed to allow the user to control several functions with a single input control pin. The pin allows for direct input PWM for speed control, is used to initiate the active braking function to reduce motor stop time, and acts as an enable pin to engage micro-power sleep mode to reduce average power consumption when not in use. The A1448 is designed for use in vibration motor applications in portable devices that require fast stop-start cycles, such as haptic applications and vibration ring tones. Commutation of the motor is achieved by use of a single Hall element to detect the rotational position of an alternating-pole ring magnet. A high density CMOS semiconductor process allows the integration of all the necessary electronics. This includes the Hall element, the motor control circuitry, and the output full bridge. Low-voltage design techniques have been employed to achieve full device functionality down to 1.8 V VDD. This fully integrated single chip solution provides enhanced reliability (including reverse battery protection and output short circuit protection) and eliminates the need for any external support components. The A1448 employs a soft-switching algorithm to reduce audible switching noise and EMI interference. The micropower sleep mode can be initiated on the CONTROL pin, and reduces current consumption for battery management in Approximate size Continued on the next page... Package: 6-contact MLP/DFN 1.5 mm x 2 mm 0.40 mm maximum overall height (EW package) Functional Block Diagram VDD Reverse Battery ESD To All Subcircuits Active Braking CONTROL Sleep Mode Drive Logic Full Bridge Q1 Q2 PWM Control VOUT1 ESD Q3 Q4 Amp VOUT2 Stall Detection Thermal Shutdown Protection GND 1448-DS, Rev. 3 A1448 Description (continued) Low-Voltage, Full-Bridge Brushless DC Motor Driver with Integrated Hall Sensor IC, PWM Speed Control, Soft-Switching, and Reverse Battery and Short Circuit Protection industry with a 0.40 mm maximum thickness that allows for very thin BLDC coin motor designs. The small package outline and low profile make this device ideally suited for use in applications where printed circuit board area and component headroom are at a premium. It is available in a lead (Pb) free, 6-contact MLP/DFN micro-leadframe package, with an exposed pad for enhanced thermal dissipation. Leadframe is 100% matte tin plated. portable electronic devices. This feature allows the removal of a FET transistor for switching the device on and off. The A1448 is optimized for vibration motor applications in cellular phones, pagers, electronic toothbrushes, hand-held video game controllers, and can also be used as a micro-fan driver for fans motors up to 1 W. The Allegro DFN (EW) package is the thinnest DFN in the Selection Guide Part Number A1448EEWLT-P Packing* 3000 pieces per 7-in. reel Package 1.5 mm x 2 mm , 0.40 mm maximum overall package height, 6-contact MLP/DFN with exposed thermal pad *Contact Allegro for additional packing options Absolute Maximum Ratings Characteristic Forward Supply Voltage Reverse Supply Voltage Forward Output Voltage Reverse Output Voltage Forward CONTROL Pin Input Voltage Reverse CONTROL Pin Input Voltage Continuous Output Current Peak Output Current Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Symbol VDD VRDD VOUT VROUT VIN VRIN IOUT IOUT(pk) TA TJ(max) Tstg Positive ILOAD flow is from VOUT1 to VOUT2, TJ < TJ(max) <1 ms Range E VDD > 0 V VDD > 0 V Notes Rating 5.5 -5.0 0 to VDD + 0.3 -0.3 0 to VDD + 0.3 VDD - 6.0 V 200 400 -40 to 85 165 -65 to 170 Units V V V V V V mA mA C C C Thermal Characteristics may require derating at maximum conditions, see Power Derating section Characteristic Package Thermal Resistance Symbol RJA Test Conditions* On 2-layer PCB, with 0.23 in.2 copper area each side Value 125 64 Units C/W C/W On 4-layer PCB based on JEDEC standard *Additional thermal information available on the Allegro website Terminal List Number Name VDD CONTROL NC GND VOUT1 VOUT2 Supply voltage Input for PWM, braking, and sleep mode No connection Ground First output Second output Function Pin-out Diagram VDD 1 CONTROL 2 NC 3 PAD 6 VOUT2 5 VOUT1 4 GND 1 2 3 4 5 6 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 A1448 Low-Voltage, Full-Bridge Brushless DC Motor Driver with Integrated Hall Sensor IC, PWM Speed Control, Soft-Switching, and Reverse Battery and Short Circuit Protection OPERATING CHARACTERISTICS Valid over supply voltage and ambient temperature ranges, unless otherwise noted Characteristics Electrical Characteristics Supply Voltage Extended Range of Supply Voltage1 Supply Current VDD VDDE IDD TJ < TJ(max) TJ < TJ(max) VIN >VINHI , TA = 25C, no load VIN < VINLO , TA = 25C IOUT = 70 mA, VDD = 2 V, TA = 25C Total Output On-Resistance2 RDS(on) IRDD VINHI VINLO IIN fPWM tPB TJTSD Device is active TJTSD(HYS) Device is active BOP Magnetic Switchpoints BRP BHYS VOUT1 Output Polarity VOUT2 1Extended Symbol Test Conditions Min. 2.0 1.8 - - - - - - 0.7 x VDD - Typ. - - 4 - 3.9 2.6 2.2 - - - 1.0 384 - 165 20 35 -35 70 LOW HIGH HIGH LOW Max. 4.2 4.2 6 10 - - - -10 - 0.2 x VDD 5 800 2.5 - - 75 - - - - - - Unit V V mA A mA V V A kHz ms C C G G G V V V V IOUT = 70 mA, VDD = 3 V, TA = 25C IOUT = 70 mA, VDD = 4 V, TA = 25C VRDD = -4.2 V Reverse Battery Current CONTROL Pin Input Threshold CONTROL Pin Input Current CONTROL Pin Input Frequency CONTROL Prebraking Time3 Thermal Shutdown Limit Thermal Shutdown Hysteresis Magnetic Characteristics4 VIN = 3.0 V - 100 - - - - -75 - B < BRP B > BOP B < BRP B > BOP - - - - VDD range affects RDS(on) and Bx. 2Total Output On-Resistance = R DS(on)Q1 + RDS(on)Q4 , or RDS(on)Q2 + RDS(on)Q3 , where Qx refers to the internal full-bridge transistors. 3Device initiates braking algorithm if the CONTROL pin is pulled to GND for longer than the maximum specified CONTROL Prebraking Time. 41 G (gauss) = 0.1 mT (millitesla). Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 A1448 Low-Voltage, Full-Bridge Brushless DC Motor Driver with Integrated Hall Sensor IC, PWM Speed Control, Soft-Switching, and Reverse Battery and Short Circuit Protection Functional Description Soft Switching The A1448 device includes a soft-switching algorithm that controls the output switching slew rate for both output pins. As a result, the A1448 device is ideal for use in applications requiring low audible switching noise and low EMI. The resistance of the output transistors is controlled to ensure the smooth switching of the outputs, as illustrated in figure 1. CONTROL Pin Functionality: PWM, Braking, and Sleep Mode Input The CONTROL input pin accepts an external signal that can control the speed of the output bridge, initiate active braking, and put the device into sleep mode. Signals higher than the VINHI threshold will turn on the output bridge according to the applied magnetic field. Applying a PWM signal to the CONTROL pin will turn the bridge on and off according to the PWM duty cycle. When the CONTROL pin is pulled to GND, the device initiates its internal active braking algorithm to stop the motor. After braking, the device enters micro-power sleep mode. The device becomes active again when the CONTROL pin is pulled higher than VINHI. Antistall Algorithm If a stall condition occurs, the device will execute an antistall algorithm to re-start the motor. VOUT2 VOUT1 tSW Figure 1. A1448 output soft switching with a 30 resistive load Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 A1448 Low-Voltage, Full-Bridge Brushless DC Motor Driver with Integrated Hall Sensor IC, PWM Speed Control, Soft-Switching, and Reverse Battery and Short Circuit Protection Application Information Figure 2 shows a typical vibration motor application in which speed control, active braking, and sleep mode are required on the CONTROL pin. Figure 3 shows an application circuit in which 100% duty cycle is required. Tying the CONTROL pin to VDD disables the braking function and the sleep mode. The user must control supply in order to control the speed of the motor. This represents a 2-wire motor design. Note that: * No external diode is required for reverse battery protection because the protection is fully integrated into the IC. * Thermal shutdown also is integrated, to protect the device against inadvertent output shorts during manufacturing or testing. * A bypass capacitor of 0.1 F is required. This capacitor is usually included on the end user PCB and therefore not necessary on the motor PCB. VBATT + VDD System Logic Control CBYP VOUT2 A1448 CONTROL NC VOUT1 GND M I/O Figure 2. Three-wire vibration motor application circuit VBATT + VDD VOUT2 A1448 CBYP M CONTROL NC VOUT1 GND Figure 3. Two-wire vibration motor application circuit Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 A1448 Low-Voltage, Full-Bridge Brushless DC Motor Driver with Integrated Hall Sensor IC, PWM Speed Control, Soft-Switching, and Reverse Battery and Short Circuit Protection Power Derating The device must be operated below the maximum junction temperature of the device, TJ (max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems website.) The package thermal resistance, RJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the effective thermal conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RJC, is relatively small component of RJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate TJ, at various PD levels. PD = VIN x IIN T = PD x RJA TJ = TA + T (1) (2) (3) For a load of 30 , and given common conditions such as: TA= 25C, VDD = 3 V, IDD = 83 mA, VLOAD = 2.43 V, ILOAD = 81 mA, and RJA = 125 C/W, (see figure 5) then: PD = VDD x IDD - VLOAD x ILOAD = 3 V x 83 mA - 2.43 V x 81 mA = 52.17 mW T = PD x RJA = 52.17 mW x 125 C/W = 7C TJ = TA + T = 25C + 7C = 32C A worst-case estimate, PD(max), represents the maximum allowable power level, without exceeding TJ(max), at a selected RJA and TA. VBATT + VDD VOUT2 A1448 CBYP M CONTROL NC VOUT1 GND Figure 5. A1448 typical application Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 A1448 Low-Voltage, Full-Bridge Brushless DC Motor Driver with Integrated Hall Sensor IC, PWM Speed Control, Soft-Switching, and Reverse Battery and Short Circuit Protection Package EW, 6-Pin MLP/DFN 1.50 0.15 0.94 F 6 F E 0.50 6 0.30 0.99 F 2.00 0.15 A 1 1.10 0.70 1.575 1 7X D 0.08 C C 0.325 SEATING PLANE 0.38 0.02 C PCB Layout Reference View 0.50 BSC NN YWW 1.25 0.05 G 1 Standard Branding Reference View N = Last two digits of device part number Y = Last digit of year of manufacture W = Week of manufacture 1.10 0.10 D Coplanarity includes exposed thermal pad and terminals E Active Area Depth 0.15 mm REF F Hall Element (not to scale) 1 0.25 0.05 B 0.70 0.10 +0.055 0.325 -0.045 6 For Reference Only, not for tooling use (refernce DWG-2856; similar to JEDEC Type 1, MO-229X2BCD) Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351 SON50P200X200X100-9M); All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) G Branding scale and appearance at supplier discretion Copyright (c)2008-2009, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro's products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 |
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